CVA6 System on Chip (SoC)

Memory Map

Base

Length

Attributes

Description

0x0000_0000

0x1000

EX

Debug Module

0x0001_0000

0x10000

EX

ROM

0x0200_0000

0xC0000

CLINT

0x0C00_0000

0x400_0000

PLIC

0x1000_0000

0x1000

UART

0x1800_0000

0x1000

Timer

0x2000_0000

0x80_0000

SPI

0x3000_0000

0x10000

Ethernet

0x4000_0000

0x1000

GPIO

0x8000_0000

0x4000_0000

EX, NI, C

DRAM

(EX: Executable, NI: Non-idempotent, C: Cached)

Platform-Level Interrupt Controller (PLIC)

The specification of CVA6’s platform-level interrupt controller (PLIC) is aligned with the PLIC of SiFive’s FU540-C000. It shares the same functionality and memory map and has the following interrupt sources:

Interrupt ID

Source

1

UART

2

SPI

3

Ethernet

4

Timer 0 (OVF)

5

Timer 0 (CMP)

6

Timer 1 (OVF)

7

Timer 1 (CMP)

8 – 30

Reserved