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Contents:

  • Introduction
  • PC Generation
  • Instruction Fetch Stage
  • Instruction Decode
  • Issue Stage
  • Execute Stage
  • Commit Stage
  • CVA6 System on Chip (SoC)
CVA6
  • Docs »
  • OpenHW Group CVA6 User Manual
  • Edit on GitHub

OpenHW Group CVA6 User Manual¶

Editor: Florian Zaruba florian@openhwgroup.org

Contents:

  • Introduction
    • Scope and Purpose
  • PC Generation
    • Branch Prediction
  • Instruction Fetch Stage
    • Fetch FIFO
  • Instruction Decode
    • Instruction Re-aligner
    • Compressed Decoder
    • Decoder
  • Issue Stage
    • Issue
    • Read Operands
    • Scoreboard
  • Execute Stage
    • ALU
    • Branch Unit
    • Load Store Unit (LSU)
    • PMA/PMP Checks
    • MMU Implementation Details
    • Multiplier
    • CSR Buffer
  • Commit Stage
  • CVA6 System on Chip (SoC)
    • Memory Map
    • Platform-Level Interrupt Controller (PLIC)

Indices and tables¶

  • Index

  • Module Index

  • Search Page

Documentation¶

The documentation is hosted in the docs folder and is re-created on pushes to master. When contributing to the project please consider the [contribution guide](https://github.com/openhwgroup/cva6/blob/master/CONTRIBUTING.md).

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